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Chapter 1: XM104
4. Multi-Gigabit Transceiver Data Port 2 - J11 SATA1
Board FPGA multi-gigabit transceiver Data Port 2 signals are wired to Serial ATA host
connector J11 on the XM104. Data Port 2 connections between the XM104 FMC HPC
connector and Serial ATA connector J11 are defined in Table 1-5 .
Table 1-5:
FPGA Multi-Gigabit Transceiver Data Port 2 Connectivity
FMC HPC Connector J1
Pin
A26
A27
A7
A6
Signal Name
DP2_C2M_P (1)
DP2_C2M_N (1)
DP2_M2C_N (1)
DP2_M2C_P (1)
Serial ATA Connector
J11
2
3
5
6
Notes:
1. AC coupled using a series 0.1 uF capacitor
5. Multi-Gigabit Transceiver Data Port 3 - J12 SATA2
Board FPGA multi-gigabit transceiver Data Port 3 signals are wired to a Serial ATA host
connector J12 on the XM104. Data Port 3 connections on the XM104 FMC HPC connector
and Serial ATA connector J12 are defined in Table 1-6 .
Table 1-6:
FPGA Multi-Gigabit Transceiver Data Port 3 Connectivity
FMC HPC Connector J1
Pin
A30
A31
A11
A10
Signal Name
DP3_C2M_P (1)
DP3_C2M_N (1)
DP3_M2C_N (1)
DP3_M2C_P (1)
Serial ATA Connector
J12
2
3
5
6
Notes:
1. AC coupled using a series 0.1 uF capacitor
14
www.xilinx.com
FMC XM104 Connectivity Card User Guide
UG536 (v1.1) September 24, 2010
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